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DISCRETE SEMICONDUCTORS
DATA SHEET
BSP090 P-channel enhancement mode vertical D-MOS transistor
Product specification Supersedes data of 1997 Jan 20 File under Discrete Semiconductors, SC07 1997 Mar 13
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
FEATURES * High speed switching * No secondary breakdown * Very low on-state resistance. APPLICATIONS * Motor and actuator drivers * Power management * Synchronized rectification.
handbook, halfpage
BSP090
PINNING - SOT223 PIN 1 2 3 4 SYMBOL g d s d gate drain source drain DESCRIPTION
4 d
DESCRIPTION P-channel enhancement mode vertical D-MOS transistor in a 4-pin plastic SOT223 SMD package.
g
CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling.
s 1
Top view
2
3
MAM121
Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL VDS VSD VGS VGSth ID RDSon Ptot PARAMETER drain-source voltage (DC) source-drain diode forward voltage gate-source voltage (DC) gate-source threshold voltage drain current (DC) drain-source on-state resistance total power dissipation ID = -1 mA; VDS = VGS Ts = 100 C Ts = 100 C IS = -1.25 A CONDITIONS - - - -1 - - MIN. MAX. -30 -1.3 20 -2.8 -5.7 0.09 5 V V V V A W UNIT
ID = -2.8 A; VGS = -10 V -
1997 Mar 13
2
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VDS VGS ID IDM Ptot PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation Ts = 100 C; note 1 note 2 Ts = 100 C Tamb = 25 C; note 3 Tamb = 25 C; note 4 Tstg Tj IS ISM Notes 1. Ts is the temperature at the soldering point of the drain lead. 2. Pulse width and duty cycle limited by maximum junction temperature. 3. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 27.5 K/W. 4. Device mounted on a printed-circuit board with a Rth a-tp (ambient to tie-point) of 90 K/W. THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point VALUE 10 storage temperature operating junction temperature Ts = 100 C note 2 CONDITIONS - - - - - - - -65 -65 - - MIN.
BSP090
MAX. -30 20 -5.7 -22 5 3.3 1.25 +150 +150 -3.8 -15 V V A A
UNIT
W W W C C
Source-drain diode source current (DC) peak pulsed source current A A
UNIT K/W
1997 Mar 13
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP090
handbook, halfpage
15
MGD716
-102 handbook, halfpage ID (A) -10
(1)
MGD727
Ptot (W)
10 -1
tp = 10 s 50 s 100 s 1 ms 10 ms P
5 -10-1
=
tp T DC
100 ms
tp 0 0 50 100 150 Ts (C) 200 -10-2 T -1 -10-1
t -10
2 VDS (V) -10
= 0.01; Ts = 100 C. (1) RDSon limitation.
Fig.2 Power derating curve.
Fig.3 SOAR.
1997 Mar 13
4
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
CHARACTERISTICS Tj = 25 C; unless otherwise specified. SYMBOL V(BR)DSS VGSth IDSS IGSS RDSon Ciss Coss Crss Qg Qgs Qgd td(on) tr ton td(off) tf toff PARAMETER drain-source breakdown voltage gate-source threshold voltage drain-source leakage current gate leakage current drain-source on-state resistance input capacitance output capacitance reverse transfer capacitance total gate charge gate-source charge gate-drain charge turn-on delay time rise time turn-on switching time turn-off delay time fall time turn-off switching time CONDITIONS VGS = 0; ID = -10 A VGS = VDS ; ID = -1 mA VGS = 0; VDS = -24 V VGS = 20 V; VDS = 0 VGS = -4.5 V; ID = -1.4 A VGS = -10 V; ID = -2.8 A VGS = 0; VDS = -24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz VGS = 0; VDS = -24 V; f = 1 MHz VGS = -10 V; VDD = -15 V; ID = -2.8 A; Tamb = 25 C VGS = -10 V; VDD = -15 V; ID = -2.8 A; Tamb = 25 C VGS = -10 V; VDD = -15 V; ID = -2.8 A; Tamb = 25 C VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; RL = 15 ; Rgen = 6 VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; RL = 15 ; Rgen = 6 VGS = 0 to -10 V; VDD = -15 V; ID = -1 A; RL = 15 ; Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; RL = 15 ; Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; RL = 15 ; Rgen = 6 VGS = -10 to 0 V; VDD = -15 V; ID = -1 A; RL = 15 ; Rgen = 6 VGD = 0; IS = -1.25 A IS = -1.25 A; di/dt = 100 A/s MIN. -30 -1 - - - - - - - - - - - - - - - - TYP. - - - - - - 800 400 100 21 2.5 6 6 6 12 55 40 95
BSP090
MAX. - -2.8 -500 100 0.15 0.09 - - - - - - - - 25 - - 190
UNIT V V nA nA pF pF pF nC nC nC ns ns ns ns ns ns
Source-drain diode VSD trr source-drain diode forward voltage reverse recovery time - - - 70 -1.3 - V ns
1997 Mar 13
5
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP090
handbook, full pagewidth
0 -VDD Vin
10 %
RL Vout 0 10 % Vout Vin td(on) tr ton 90 %
90 %
10 %
90 % td(off) tf toff
MGD391
Fig.4 Switching time test circuit; input and output waveforms.
102 handbook, full pagewidth Rth j-s (KW)
MGD728
10
= 0.75
0.5 0.33 0.2 0.1
1
0.05 0.02 0.01 0
P
=
tp T
tp 10-1 10-5 T 10-4 10-3 10-2 10-1 1 tp (s)
t
10
Fig.5 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.
1997 Mar 13
6
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP090
handbook, halfpage
2000
MGD729
handbook, halfpage
-25
MGD730
C (pF) 1500
ID (A)
-20
VGS = -10 V -6 V -5 V
-4.5 V
-15 1000
(1)
-4 V
-10 500
(2)
-3.5 V
-5
(3)
-3 V -2.5 V
0 0
-8
-16
VDS (V)
-24
0 0
-4
-8
VDS (V)
-12
VGS = 0; f = 1 MHz; Tj = 25 C. (1) Ciss. (2) Coss. (3) Crss. Tamb = 25 C; tp = 80 s; = 0.
Fig.6
Capacitance as a function of drain-source voltage; typical values.
Fig.7 Output characteristics; typical values.
handbook, halfpage
-30
MGD731
handbook, halfpage
-12
MGD732
-18 VDS (V) -12
ID (A)
VGS (V) -8
VGS
-20
-10
-4
-6
VDS 0 0 -2 -4 -6 VGS (V) -8 0 0 10 20 QG (nC) 0 30
VDD = -15 V; ID = -2.8 A; Tamb = 25 C.
VDS = -10 V; Tamb = 25 C; tp = 80 s; = 0.
Fig.9
Fig.8 Transfer characteristics; typical values.
Gate-source voltage and drain-source voltage as a function of total gate charge; typical values.
1997 Mar 13
7
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
BSP090
handbook, halfpage
-16
MGD733
103 handbook, halfpage
MGD734
IS (A) -12
(1) (2) (3)
RDSon (m)
-8
102
ID = 100 mA 500 mA 1.4 A 2.8 A 5.5 A 10 A 15 A 22 A
-4
0 0
-0.5
-1.0
-1.5
-2.5 -2.0 VSD (V)
10
0
-2
-4
-6
-8 -10 VGS (V)
VGD = 0. (1) Tamb = 150 C; tp = 80 s; = 0. (2) Tamb= 25 C; tp = 80 s; = 0. (3) Tamb= -65 C; tp = 80 s; = 0.
Tamb = 25 C; tp = 80 s; = 0. VDS ID x RDSon.
Fig.10 Source current as a function of source-drain diode forward voltage; typical values.
Fig.11 Drain-source on-state resistance as a function of gate-source voltage; typical values.
handbook, halfpage
1.2 k
MGD735
handbook, halfpage
1.8
MGD736
1.1
k
(1) (2)
1.4 1.0
0.9 1.0 0.8
0.7 -75
-25
25
75
125
175 Tj (C)
0.6 -75
-25
25
75
125
V GSth at T j k = ------------------------------------V GSth at 25C VGSth at VDS = VGS; ID = -1 mA.
R DSon at T j k = ---------------------------------------R DSon at 25 C (1) RDSon at VGS = -10 V; ID = -2.8 A. (2) RDSon at VGS = -4.5 V; ID = -1.4 A.
175 Tj (C)
Fig.12 Temperature coefficient of gate-source threshold voltage as a function of junction temperature; typical values.
Fig.13 Temperature coefficient of drain-source on-resistance as a function of junction temperature; typical values.
1997 Mar 13
8
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
PACKAGE OUTLINE
BSP090
handbook, full pagewidth
0.95 0.85
S 0.32 0.24
seating plane 6.7 6.3 3.1 2.9
0.1 S
B 4
0.2 M A
A
0.10 0.01
3.7 3.3
o
7.3 6.7
16 o max
16
1 1.80 max 10 o max 2.3 4.6
2 0.80 0.60
3 0.1 M B (4x)
MSA035 - 1
Dimensions in mm.
Fig.14 SOT223.
1997 Mar 13
9
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
DEFINITIONS Data Sheet Status Objective specification Preliminary specification Product specification Limiting values
BSP090
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
1997 Mar 13
10
Philips Semiconductors
Product specification
P-channel enhancement mode vertical D-MOS transistor
NOTES
BSP090
1997 Mar 13
11
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997
Internet: http://www.semiconductors.philips.com
SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
117067/00/03/pp12
Date of release: 1997 Mar 13
Document order number:
9397 750 01787

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